Design 18: Computer Architecture

Monday, June 22, 2026

By Julius Boateng

Theme

I was excited to write about Computer Architecture because it was one of the few topics that highlights the hardware that makes computers work. For many software engineers, a lot of time is spent writing programs in high-level programming languages. As a result, I don't spend much time exploring low-level concepts. I may indirectly interact with CPUs, RAM, and caches, but it's usually high-level libraries calling other libraries, which eventually call the operating system that interacts with the hardware.

My experience doesn't apply to all other engineers. For example, engineers working in areas like virtual machines, embedded systems, and firmware spend their time a lot closer to the hardware.

Since most of my time is spent writing code for web services, it's nice to explore lower-level concepts rather than continually interacting with abstractions on top of abstractions. I like Computer Architecture because it bridges the gap between hardware and software.

Grid

I was able to create a relatively balanced grid with 7 across and 9 down clues and more importantly the lengths were pretty evenly distributed between them. When creating the clues, I had to keep in mind the number of answers that were abbreviations. I didn't want the puzzle to be abbreviation heavy. In total 6 clues were short abbreviations: RISC, CISC, X86, CPU, RAM, and ARM. Abbreviations can sometimes be less approachable than full terms, but thankfully most of these are well-known terms outside of RISC and CISC.

I added Interrupt and Exception as additional fill during construction to prevent the board from feeling sparse. They represented the signal / control flow side of computer architecture.

Clues

I liked learning about the differences between Von Neumann and Harvard architecture as well as the difference between RISC (reduced instruction set) and CISC (complex instruction set). Both pairs highlight tradeoffs rather than one approach being strictly better than another.

Von Neumann uses a shared memory space for instructions and data, which simplifies hardware but creates a bottleneck. Harvard uses separate memory spaces, removing the bottleneck at the cost of additional complexity.

A similar tradeoff exists between RISC and CISC. RISC favors simpler instructions at the cost of more instructions needed for operations, while CISC provides more complex instructions but requires more complex hardware.

The interesting thing about these clues is that they involve tradeoffs. If I were to naively design a processor, I might choose Harvard architecture and CISC because it sounds optimal at first glance. However, I've slowly come to realize that a lot of complexity lives in the nuances of the problem you're trying to solve.

The Linus vs Tanenbaum debate was based on theoretically optimal microkernel vs monolithic architecture. However, Linux has been incredibly successful despite being monolithic. Monolithic kernels are generally considered less optimal in terms of modularity and isolation, but provide advantages in development speed and raw performance.

Tradeoffs

Since several clues shared similar concepts, I had to make sure to highlight their differences and be very specific to prevent confusion. For example, Harvard and Von Neumann architecture, RISC and CISC instruction sets, Interrupt and Exception signals, and X86 and ARM processors. Without creating a contrast, it would be easy for these answers to blend together.

Notes

Next puzzle will be about Computer Science Papers!